Curated semiconductor and AI infrastructure intelligence — sourced, verified, and continuously updated.
All figures are illustrative estimates only. Sourced from public announcements and analyst reports — approximated for demo purposes. Not for investment, trading, or business decisions.
NVIDIA has begun shipping GB200 NVL72 rack-scale systems to major cloud providers including Microsoft Azure, Google Cloud, and AWS. CoWoS-L packaging constraints and HBM3e allocation remain key limiting factors on supply volumes. [DEMO est.]
Periodic military exercises in the Taiwan Strait region continue to focus analyst attention on semiconductor supply chain concentration risk. TSMC's leading-edge fabs (N3E, N2) are located in Taiwan, representing the vast majority of global sub-5nm capacity. [DEMO analysis]
TSMC is accelerating CoWoS-L and CoWoS-S capacity expansion to meet AI GPU packaging demand. Analyst estimates suggest capacity targeting approximately 3x 2023 levels by end of 2025. CoWoS remains a single-source constraint for AI GPU production. [DEMO est.]
Microsoft announced plans to invest approximately $80B in AI-capable datacenter infrastructure in fiscal year 2025, with over half allocated to US facilities. The investment is focused on training large AI models and deploying Azure AI services globally. [DEMO est.]
Intel Foundry has confirmed that Intel 18A — featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery — has entered risk production at its Chandler, Arizona fabs. This is a key milestone for Intel's foundry turnaround strategy. [est.]
SK Hynix announced that its HBM3e (12-hi, 36GB per stack) production capacity is effectively fully allocated through end of 2025, with NVIDIA as the primary customer. Micron and Samsung are ramping alternative supply but face qualification lead times. [DEMO est.]
TSMC has confirmed N2 (2nm-class GAA nanosheet) is on track for mass production in 2025. Apple A20 chip series is identified as the lead customer. N2 delivers approximately 10-15% performance uplift over N3E at similar power. [est.]
TSMC's first US fab in Phoenix, Arizona has entered volume production on the N4P process node. Apple is the lead customer for A16 chip production. The facility represents a $12B investment supported by the US CHIPS and Science Act.
The US Department of Commerce finalized an $8.5B CHIPS Act direct grant to Intel for expansion of domestic semiconductor manufacturing, including Fab 52 and Fab 62 in Chandler, Arizona targeting Intel 18A production. Additional $11B in loans announced. [Public record]
xAI's Colossus cluster in Memphis, Tennessee is reportedly expanding from 100K to over 200K GPU capacity using NVIDIA H100 and H200 systems. The facility is used for training Grok AI models. Power supply expansion is reportedly a key constraint. [DEMO est.]
SMIC's most advanced N+2 (~7nm-class) process uses complex DUV multi-patterning in the absence of EUV lithography. Yield improvement and capacity expansion are progressing but constrained by lithography limitations imposed by US export controls. [DEMO est.]
Samsung Foundry's Taylor, Texas fab is reportedly facing delays in its construction and production ramp timeline. Original 2024 production targets have been pushed back. The facility targets SF4/SF2 production with $17B in planned investment. [DEMO est.]
AMD's MI300X accelerator with 192GB HBM3 is gaining significant traction as an H100/H200 alternative for large-context AI inference workloads. Microsoft Azure, Oracle, and Meta have publicly confirmed MI300X deployments. [DEMO est.]
TSMC secured a $6.6B direct grant and up to $5B in loans under the CHIPS and Science Act for its three planned Arizona fabs (N4P, N2, and A16 phases). Production on Phase 2 (N2) is targeted for 2028. [Public record]
Cerebras Systems has made its WSE-3 wafer-scale AI accelerator generally available. At 125,000 TFLOPS (FP16) and 44GB on-chip SRAM, the WSE-3 eliminates HBM dependency and CoWoS packaging constraints. TSMC N5 full-wafer production. [DEMO est.]