AI accelerators, training chips, and inference processors. Key supply chain intelligence for the AI infrastructure stack.
All compute figures (TFLOPS), memory bandwidth, TDP, and release timelines are illustrative estimates from public sources. Actual chip specifications may differ. Data labeled with confidence level. Not for investment decisions.
| Chip | Status | Process Node | Packaging | Memory | Bandwidth | Peak Compute | TDP | GA Year | Confidence |
|---|---|---|---|---|---|---|---|---|---|
MI300X CDNA3 AI Inference / Training | Generally Avail. | TSMC N5 / N6 (chiplets) [est.] | CoWoS (Advanced Chiplet Package) | HBM3192GB | 5,300 GB/s | 1,307 FP8 | 750W | 2023 | HIGH[AMD Financial Analyst Day 2023] |
MI400 CDNA4 AI Training / Inference | In Development | TSMC N3P [est.] | Advanced CoWoS / SoIC [est.] | HBM3e [est.] | — | — | — | 2026 | LOW[AMD Roadmap Slides 2024] |
| Chip | Status | Process Node | Packaging | Memory | Bandwidth | Peak Compute | TDP | GA Year | Confidence |
|---|---|---|---|---|---|---|---|---|---|
Trainium2 Trainium AI Training | Ramping | TSMC N4 (4nm-class) [est.] | Custom AWS packaging [est.] | HBM396GB | 3,200 GB/s | 1,700 FP8 | 500W | 2024 | MED[AWS re:Invent 2023] |
| Chip | Status | Process Node | Packaging | Memory | Bandwidth | Peak Compute | TDP | GA Year | Confidence |
|---|---|---|---|---|---|---|---|---|---|
WSE-3 Wafer Scale Engine AI Training / LLM | Generally Avail. | TSMC N5 (5nm, full wafer) [est.] | Full wafer — no packaging | SRAM (on-chip)44GB | 21,000 GB/s | 125,000 FP16 | 23000W | 2024 | HIGH[Cerebras Product Launch 2024] |
| Chip | Status | Process Node | Packaging | Memory | Bandwidth | Peak Compute | TDP | GA Year | Confidence |
|---|---|---|---|---|---|---|---|---|---|
TPU v5e Trillium AI Training / Inference | Generally Avail. | TSMC N5 (5nm-class) [est.] | Proprietary Google packaging [est.] | HBM2e16GB | 820 GB/s | 393 BF16 | 197W | 2023 | MED[Google I/O 2023 / GCP Product Page] |
TPU v5p Trillium AI Training (Large Scale) | Generally Avail. | TSMC N4 (4nm-class) [est.] | Proprietary Google packaging [est.] | HBM396GB | 2,765 GB/s | 918 BF16 | 450W | 2023 | MED[Google I/O 2023] |
| Chip | Status | Process Node | Packaging | Memory | Bandwidth | Peak Compute | TDP | GA Year | Confidence |
|---|---|---|---|---|---|---|---|---|---|
GroqChip LPU LPU AI Inference (Ultra-low latency) | Generally Avail. | TSMC N14 (14nm) [est.] | Standard flip-chip [est.] | SRAM (on-chip)0 | 80,000 GB/s | 750 FP16 | 300W | 2023 | MED[Groq product page / Hot Chips 2023] |
| Chip | Status | Process Node | Packaging | Memory | Bandwidth | Peak Compute | TDP | GA Year | Confidence |
|---|---|---|---|---|---|---|---|---|---|
H100 SXM5 Hopper AI Training / HPC | Generally Avail. | TSMC N4 (4nm-class) [est.] | CoWoS-L | HBM380GB | 3,350 GB/s | 1,979 FP8 | 700W | 2022 | HIGH[NVIDIA GTC 2022 / Hot Chips 2022] |
H200 SXM5 Hopper AI Training / Inference | Generally Avail. | TSMC N4P (4nm-class) [est.] | CoWoS-L | HBM3e141GB | 4,800 GB/s | 1,979 FP8 | 700W | 2024 | HIGH[NVIDIA SC23 Announcement] |
B200 / GB200 Blackwell AI Training / Inference | Ramping | TSMC N4P (4nm-class) [est.] | CoWoS-L (NVLink-C2C bridge) | HBM3e192GB | 8,000 GB/s | 9,000 FP4 | 1000W | 2025 | MED[NVIDIA GTC 2024] |
Rubin R100 Rubin AI Training / Inference | In Development | TSMC N3 (3nm-class) [est./spec.] | SoIC + CoWoS-L [spec.] | HBM4 [spec.] | — | — | — | 2026 | LOW[NVIDIA Investor Day 2024 roadmap] |
| Chip | Status | Process Node | Packaging | Memory | Bandwidth | Peak Compute | TDP | GA Year | Confidence |
|---|---|---|---|---|---|---|---|---|---|
Dojo D1 Dojo AI Training (Computer Vision) | Ramping | TSMC N7 (7nm-class) [est.] | Custom Tesla ExaPOD tile [est.] | SRAM (on-die) | 10,000 GB/s | 362 FP32 | 400W | 2023 | MED[Tesla AI Day 2021 / Hot Chips 2022] |
Dominant Foundry
TSMC
Manufactures virtually all leading AI accelerators. NVIDIA, AMD, Google, Amazon all on TSMC N4/N5. [est.]
[Analyst consensus]HBM Bottleneck
SK Hynix
Primary HBM3e supplier. NVIDIA Blackwell allocation reported to be prioritized over other customers. [est.]
[SK Hynix Q3 2024 earnings]Packaging Constraint
CoWoS-L
TSMC CoWoS advanced packaging has been a key supply constraint for H100/H200/Blackwell GPU production. [est.]
[TSMC earnings / analyst reports 2023–2024]* All compute figures, memory specs, and release timelines are illustrative estimates from public announcements. Speculative chips () have low-confidence data. Not for investment use.